In the semiconductor industry, the minimum feature sizes of microelectronic devices are approaching the deep sub-micron regime to meet the demand for faster, lower power microprocessors and digital circuits. Process development and integration issues are key challenges for new gate stack materials and silicide processing, where the imminent replacement of SiO2 with higher permittivity dielectric materials necessitates the use of alternative gate electrode materials to replace doped poly-silicon.
The introduction of metal gate electrodes to replace the traditional poly-silicon gates brings about several advantages. These advantages include elimination of the poly-silicon gate depletion effect, reduction in sheet resistance, better reliability and potentially better thermal stability on advanced high-permittivity gate dielectrics. One of the material selection criteria for the metal gate electrode is that the workfunction be adjustable. Control over the gate workfunction is achieved by using a dual metal gate, since a metal alloy containing variable amounts of the metal constituents can yield an adjustable intermediate gate work function. From a processing point of view, the metal gate should be easily deposited by conventional techniques, such as CVD or sputtering, and be selectively etched by commonly used plasma etching processes. However, there are a number of processing difficulties in the dual metal gate approach. Etching characteristics of the different metal components are likely to be different, which can lead to etch rates that vary greatly from one metal to another, resulting in poor edge profiles and the need for complex manufacturing processes. Capacitively coupled plasma sources are widely used for dry etching processes to remove a layer of material from a wafer surface. At these small dimensions, etch uniformity and selectivity over the wafer surface has become increasingly more important, particularly when a layer is being etched according to a pattern. When manufacturing circuits with advanced feature sizes, anisotropic etching methods are needed that allow excellent control over the etching process. This is achieved using ion-assisted etching processes that comprise a strong physical component in addition to a chemical component. The chemical component conventionally involves a mixture of process gases that react with the substrate and form a reaction layer on the substrate. The physical component involves subsequent direct line-of-sight impaction of gas phase ions on the surface that results in physical desorption of the reaction products from the surface and material removal. The reaction (passivation) layer on the sidewalls of high-aspect-ratio structures receives low levels of ion bombardment, resulting in slow etching of the sidewalls, which leads to anisotropic etching profiles.
Potential Ni-containing materials for use as metal gates include Ti—Ni dual metal alloys. Ti—Ni alloys are known to be thermally stable, which allows them to be used at the high temperatures that are necessary for source/drain implant activation. Etching of Ti- and Ni-containing materials has been carried out using halogen-based chemistry, but halogen plasma etching of Ni is difficult, in part since Ni-halide etching products (e.g., NiBr2, NiCl2 or Nil2) have very low vapor pressures and high process temperatures (>200° C.) are needed for ion-assisted etching of the Ni-halide reaction products. The high temperature requirement along with potential redeposition of the Ni-halide etching products on to the chamber hardware imposes serious restrictions on the reliability and productivity of the etching chamber hardware. Removal of Ni-halide etching products is possible at low temperatures through physical sputtering, but this method is undesirable for semiconductor processing and integration into gate-conductor etching.
These problems illustrate that successful integration of Ni-containing metal gates into conventional CMOS technology requires ion-assisted plasma etching methods that allow anisotropic etching of the metal gates at low temperatures. In addition, it is important that these etching methods result in etching products that do not redeposit on the walls of the processing chamber.
Other Ni-containing materials that require low temperature etching methods include Ni—Fe layers which are important in magnetoresistive random access memory (MRAM) devices.